Extended columns
The verifier sends challenges (or the prover samples them from the transcript). Additional columns are added to incorporate the memory constraints. To define them the prover follows these steps:
- Stack the rows of the submatrix of defined by the columns
pc, dst_addr, op0_addr, op1_addr
into a vectora
of length (this means that the first entries ofa
arepc[0], dst_addr[0], op0_addr[0], op1_addr[0], pc[1], dst_addr[1],...
). - Stack the the rows of the submatrix defined by the columns
inst, dst, op0, op1
into a vectorv
of length . - Define to be the matrix with columns , .
- Define to be the matrix that's equal to in the first rows, and its last entries are the addresses and values of the actual public memory (program code).
- Sort by the first column in increasing order. The result is a matrix of size . Denote its columns by and .
- Compute the vector of size with entries
- Reshape the matrix into a in row-major. Reshape the vector into a matrix in row-major.
- Concatenate these 12 rows. The result is a matrix of size
The verifier sends challenge . Further columns are added to incorporate the range check constraints following these steps:
- Stack the rows of the submatrix of defined by the columns in the group
offsets
into a vector of length . - Sort the values of in increasing order. Let be the result.
- Compute the vector of size with entries
- Reshape and into matrices of size each and concatenate them into a matrix of size .
- Concatenate and into a matrix of size .
Using the notation described at the beginning, , and . They are respectively the columns of the first and second part of the rap, and the total number of columns.
Putting all together, the final layout of the trace is the following
A. flags (16) : Decoded instruction flags
B. res (1) : Res value
C. pointers (2) : Temporary memory pointers (ap and fp)
D. mem_a (4) : Memory addresses (pc, dst_addr, op0_addr, op1_addr)
E. mem_v (4) : Memory values (inst, dst, op0, op1)
F. offsets (3) : (off_dst, off_op0, off_op1)
G. derived (3) : (t0, t1, mul)
H. mem_a' (4) : Sorted memory addresses
I. mem_v' (4) : Sorted memory values
J. mem_p (4) : Memory permutation argument columns
K. offsets_b' (3) : Sorted offset columns
L. offsets_p' (3) : Range check permutation argument columns
A B C D E F G H I J K L
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